Freescale Semiconductor /MKL24Z4 /SPI1 /C1

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Interpret as C1

SPE=0, SPIE=0, CPHA=0, SSOE=0, LSBFE=0, MSTR=0, CPOL=0, SPTIE=0

Description

SPI control register 1

Fields

LSBFE	LSB first (shifter direction) 0 (0): SPI serial data transfers start with most significant bit 1 (1): SPI serial data transfers start with least significant bit
SSOE	Slave select output enable 0 (0): When MODFEN is 0: In master mode, SS pin function is general-purpose I/O (not SPI). In slave mode, SS pin function is slave select input. When MODFEN is 1: In master mode, SS pin function is SS input for mode fault. In slave mode, SS pin function is slave select input. 1 (1): When MODFEN is 0: In master mode, SS pin function is general-purpose I/O (not SPI). In slave mode, SS pin function is slave select input. When MODFEN is 1: In master mode, SS pin function is automatic SS output. In slave mode: SS pin function is slave select input.
CPHA	Clock phase 0 (0): First edge on SPSCK occurs at the middle of the first cycle of a data transfer 1 (1): First edge on SPSCK occurs at the start of the first cycle of a data transfer
CPOL	Clock polarity 0 (0): Active-high SPI clock (idles low) 1 (1): Active-low SPI clock (idles high)
MSTR	Master/slave mode select 0 (0): SPI module configured as a slave SPI device 1 (1): SPI module configured as a master SPI device
SPTIE	SPI transmit interrupt enable 0 (0): Interrupts from SPTEF inhibited (use polling) 1 (1): When SPTEF is 1, hardware interrupt requested
SPE	SPI system enable 0 (0): SPI system inactive 1 (1): SPI system enabled
SPIE	SPI interrupt enable: for SPRF and MODF 0 (0): Interrupts from SPRF and MODF are inhibited-use polling 1 (1): Request a hardware interrupt when SPRF or MODF is 1

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